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Infineon’s new memory chip doubles bandwidth for low pin-count

The device features a new,16-bit extended version of the HyperBus interface that doubles throughput to 800 MBps.

Infineon HyperRAM 3.0

Infineon Technologies AG has added HYPERRAM 3.0 to its portfolio of high-bandwidth, low-pin count memory solutions. The device features a new,16-bit extended version of the HyperBus interface that doubles throughput to 800 MBps. With HYPERRAM 3.0, Infineon offers a portfolio of high-bandwidth memories with low pin count and low power.
It is a perfect fit for applications requiring expansion RAM, including video buffering, factory automation, Artificial Intelligence of Things (AIoT), automotive vehicle-to-everything (V2X), and applications requiring scratch-pad memory for intense mathematical calculations.

“The new HYPERRAM 3.0 memory solutions achieve a far higher throughput-per-pin than existing technologies in the market such as PSRAMs and SDR DRAMs,” said Ramesh Chettuvetty, Senior Director of Applications and Marketing at Infineon’s Automotive Division. “Our low-power features enable better power consumption, without sacrificing throughput, which also makes this memory ideal for industrial and IoT solutions.”

Infineon’s HYPERRAM is a stand-alone PSRAM-based volatile memory that offers to add extension memory. The data rates are equivalent to SDR DRAM but with lower pin-count and lower power requirements. The increased per-pin data throughput of the HyperBus interface makes it possible to use microcontrollers (MCUs) with fewer pins and PCBs with fewer layers. This provides opportunities for lower-complexity and thus cost-optimized designs to support target applications.